INTERNATIONAL ORGANISATION FOR STANDARDISATION
ORGANISATION INTERNATIONALE DE NORMALISATION
ISO/IEC JTC1/SC29/WG11
CODING OF MOVING PICTURES AND AUDIO

ISO/IEC JTC1/SC29/WG11
MPEG97/N2005
Feb 1998/San Jose

Source: Audio Subgroup
Title: Revised Report on Complexity of MPEG-2 AAC Tools
Authors: S. R. Quackenbush and Y. Toguri



Revised Report on Complexity of MPEG-2 AAC Tools


This web page contains only excerpts of the document. The complete document is available as PDF file.


Introduction

This document is based on document N1712 [1] , which presented the complexity of the tools in MPEG-2 AAC Main and Low Complexity Profiles. We add to this an analysis of the complexity of AAC Scaleable Sampling Rate (SSR) Profile, so that this document presents a unified report on the complexity of all tools in MPEG-2 AAC profiles.

We desire to quantify the complexity of the tools in the MPEG-2 Advanced Audio Coding (AAC) decoder. They are:

Unless otherwise indicated, complexity is specified in terms of

We assume that:

Furthermore, we only indicate storage that is required by a tool and cannot be shared or re-used by other tools. Specifically, we do not count temporary, stack-based scratch storage ("automatic" variables), as such storage is implicitly shared across tools.

Unless explicitly indicated, all complexity figures are for one audio channel.

Overview

One should consider two important categories of AAC decoder implementations: software decoders running on general-purpose processors, and hardware decoders running on single-chip ASICs. For these two categories the data presented in this document, augmented by demonstrated real-time software decoder implementations, can be summarized in the following table:

Decoder

Complexity

2-channel Main profile software decoder

40 % of 133 MHz Pentium

2-channel Low Complexity profile software decoder

25 % of 133 MHz Pentium

5-channel Main profile hardware decoder

90 sq. mm die, 0.5 micron CMOS

5-channel Low Complexity profile hardware decoder

60 sq. mm die, 0.5 micron CMOS

2-channel Scaleable Sampling Rate profile software decoder

not estimated

5-channel Scaleable Sampling Rate profile hardware decoder

53 sq. mm die, 0.5 micron CMOS (3 band decoder)

In this Table, the 3-band SSR decoder complexity is shown. The 4-band SSR decoder has almost the same complexity as Low Complexity Profile.


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Heiko Purnhagen 02-Apr-1998